Shopping Cart
0 Item in Cart
Vlsi Architectures For Modern Error-Correcting Codes

Vlsi Architectures For Modern Error-Correcting Codes
Books from same Author: Xinmiao Zhang
Books from same Publisher: T and F CRC

Rating  
(80 Ratings)

Retail Price: 10764.00/-
Price: 7750.00/-
Inclusive all taxes
28.00% OFF
Sold By: Machwan

Offer 1: Get 28.00% + Flat ₹ 50 discount on shopping of ₹ 1000
                use code:
IND50

Offer 2: Get 28.00% + Flat ₹ 100 discount on shopping of
                ₹ 1500 use code:
IND100

Offer 3: Get 28.00% + Flat ₹ 300 discount on shopping of
                ₹ 5000 use code:
MPSTK300

Free Shipping (for orders above ₹ 499)  *T&C apply.

Only 4 Left In Stock Click For New Edition
Select Quantity :


International Shipping Click for International Order
Description

Error-correcting codes are ubiquitous. They are adopted in almost every modern digital communication and storage system, such as wireless communications, optical communications, Flash memories, computer hard drives, sensor networks, and deep-space probing. New-generation and emerging applications demand codes with better error-correcting capability. On the other hand, the design and implementation of those high-gain error-correcting codes pose many challenges. They usually involve complex mathematical computations, and mapping them directly to hardware often leads to very high complexity. VLSI Architectures for Modern Error-Correcting Codes serves as a bridge connecting advancements in coding theory to practical hardware implementations. Instead of focusing on circuit-level design techniques, the book highlights integrated algorithmic and architectural transformations that lead to great improvements on throughput, silicon area requirement, and/or power consumption in the hardware implementation. The goal of this book is to provide a comprehensive and systematic review of available techniques and architectures, so that they can be easily followed by system and hardware designers to develop en/decoder implementations that meet error-correcting performance and cost requirements. This book can be also used as a reference for graduate-level courses on VLSI design and error-correcting coding. Particular emphases are placed on hard- and soft-decision Reed-Solomon (RS) and Bose-Chaudhuri-Hocquenghem (BCH) codes, and binary and non-binary low-density parity-check (LDPC) codes. These codes are among the best candidates for modern and emerging applications due to their good error-correcting performance and lower implementation complexity compared to other codes. To help explain the computations and en/decoder architectures, many examples and case studies are included. More importantly, discussions are provided on the advantages and drawbacks of different implementation approaches and architectures.

More Details About Vlsi Architectures For Modern Error-Correcting Codes
100 % AUTHENTIC PRODUCT GUARANTEE
Each book uploaded on our portal passes through rigorous Anti-Piracy check to ensure the book is genuine. We have teams deployed for checking the quality at multiple levels.
Team 1 : Before uploading a book we ensure each book is coming through an approved source.
Team 2 : Before an order goes for packing we checks the authenticity of the procuring source. Then only we process the order.
General Information
Author(s)Xinmiao Zhang
PublisherT and F CRC
ISBN9781482229646
Pages410
BindingHardcover
LanguageEnglish
Publish YearJuly 2015
Reviews of Vlsi Architectures For Modern Error-Correcting Codes
Average Rating

Write A Review

TOP REVIEWS


Top Reviews lists the most relevant product reviews only.


RECENT TOP REVIEWS