×







We sell 100% Genuine & New Books only!

Introduction To Logic Design 2008 Edition at Meripustak

Introduction To Logic Design 2008 Edition by Svetlana N. Yanushkevich, Vlad P. Shmerko , Taylor & Francis Ltd

Books from same Author: Svetlana N. Yanushkevich, Vlad P. Shmerko

Books from same Publisher: Taylor & Francis Ltd

Related Category: Author List / Publisher List


  • Price: ₹ 995.00/- [ 3.00% off ]

    Seller Price: ₹ 965.00

Estimated Delivery Time : 4-5 Business Days

Sold By: Meripustak      Click for Bulk Order

Free Shipping (for orders above ₹ 499) *T&C apply.

In Stock

We deliver across all postal codes in India

Orders Outside India


Add To Cart


Outside India Order Estimated Delivery Time
7-10 Business Days


  • We Deliver Across 100+ Countries

  • MeriPustak’s Books are 100% New & Original
  • General Information  
    Author(s)Svetlana N. Yanushkevich, Vlad P. Shmerko
    PublisherTaylor & Francis Ltd
    ISBN9781420060942
    Pages720
    BindingHardback
    LanguageEnglish
    Publish YearFebruary 2008

    Description

    Taylor & Francis Ltd Introduction To Logic Design 2008 Edition by Svetlana N. Yanushkevich, Vlad P. Shmerko

    With an abundance of insightful examples, problems, and computer experiments, Introduction to Logic Design provides a balanced, easy-to-read treatment of the fundamental theory of logic functions and applications to the design of digital devices and systems. Requiring no prior knowledge of electrical circuits or electronics, it supplies the essential material to understand the basic operation and design of digital systems. Satisfying the Requirements of an Introductory Course The text presents a clear picture of basic concepts, effective problem-solving techniques, modern technologies, and applications. It focuses on the relationships between and the manipulation of various data structures. By examining the similarities and differences between assorted theoretical approaches for the representation, manipulation, and optimization of Boolean functions, the authors provide a unified overview of the relationships among digital system design, computer organization, micro- and nanoelectronics, and numerical methods. The book also describes classical minimization techniques, along with advanced and emerging problems of logic design. Meeting the Needs of Developing Technology Reflecting the integrated nature of modern engineering, this text shows how theoretical ideas, physical devices, and design methodologies come together to form a successful design approach. It provides the basis to explore even more sophisticated aspects in the field. Preface Design Process and Technology Theory of logic design Analysis and synthesis Implementation technologies Predictable technologies Contemporary CAD of logic networks Number Systems Positional numbers Counting in a positional number system Basic arithmetic operations in various number systems Binary arithmetic Radix-complement representations Techniques for conversion of numbers in various radices Overflow Residue arithmetic Other binary codes Redundancy and reliability Graphical Data Structures Graphs in discrete devices and systems design Basic definitions Tree-like graphs and decision trees Algebra I: Boolean Definition of Boolean algebra over the set {0, 1} Boolean functions Fundamentals of computing Boolean functions Proving the validity of Boolean equations Gates Local transformations Observability and validity check Fundamental Expansions Shannon expansion with respect to a single variable Shannon expansion with respect to a group of variables Shannon expansion with respect to all variables (boundary case) Other forms of Shannon expansion Boolean difference Controllability and observability for logic networks The logic Taylor expansion Graphical representation of Shannon expansion Boolean Data Structures The data structure types The relationships between data structures The truth table K-map Cube data structure Hypercube data structure Logic networks Network of threshold gates Binary decision trees Decision diagrams Properties of Boolean Functions (Optional) Self-dual Boolean functions Monotonic Boolean functions Linear functions Symmetric functions Universal set of functions Optimization I: Algebraic and K-Maps The minterm and maxterm expansions: algebraic forms Optimization of Boolean functions in algebraic forms Implementing SOP expression using the library of gates Minimization of Boolean functions using K-maps Quine-McCluskey algorithm Boolean function minimization using decision diagrams Optimization II: Decision Diagrams Optimization of Boolean functions using decision trees Decision diagrams for symmetric Boolean functions Measurement of efficiency of decision diagrams Representation of multi-output Boolean functions Embedding decision diagrams into lattice structures Algebra II: Polynomial Algebra of the polynomial forms GF(2) algebra Relationship between standard SOP and polynomial forms Local transformations for EXOR networks Factoring of polynomials Validity check for EXOR networks Manipulation of Polynomial Expressions Fixed and mixed polarity polynomial forms Computing the coefficients of polynomial forms Decision Diagrams for Polynomial Forms (Optional) Function of the nodes Techniques for the functional decision trees construction Functional decision tree reduction Standard Modules of Combinational Networks Data transfer logic Implementation of Boolean functions using multiplexers Demultiplexers Decoders Implementation of Boolean functions using decoders Encoders Combinational Logic Network Design Design example: binary adder Design example: the two-bit magnitude comparator Design example: BCD adder Verification problem Decomposition Error detection and error correction logic networks Standard Modules of Sequential Logic Networks Physical phenomena of storing data Basic principles Data structures for sequential logic networks analysis and synthesis Latches Flip-flops Registers Counters Decision diagrams in modeling of standard sequential elements Memory and Programmable Devices Gate array concept Random-access memory Read-only memory Memory expansion Programmable logic Field-programmable gate arrays Sequential Logic Network Design Mealy and Moore models of sequential networks Data structures for analysis of sequential networks Analysis of sequential networks with various types of flip-flops Techniques for synthesis of sequential networks State table reduction and assignment Decision diagrams in modeling of sequential networks Design for Testability Fault detection and Boolean differences Fault models based on functional decision diagrams Detection of stuck at faults Path sensitizing Random tests Design for testability techniques Index An Introduction, a Summary, Further Study, Solutions to Practice Problems, and Problems appear in each chapter.



    Book Successfully Added To Your Cart