Description
Springer Closing The Power Gap Between Asic & Custom by David Chinnery
Explains how to use low power design in an automated design flow, and examine the design time and performance trade-offs_x000D__x000D__x000D_Includes the latest tools and techniques for low power design applied in an ASIC design flow_x000D__x000D__x000D_Focuses on low power in an automated design methodology, a much neglected area_x000D_ _x000D_
Overview of the Factors Affecting the Power Consumption.- Pipelining to Reduce the Power.- Voltage Scaling.- Methodology to Optimize Energy of Computation for SOCs.- Linear Programming for Gate Sizing.- Linear Programming for Multi-Vth and Multi-Vdd Assignment.- Power Optimization using Multiple Supply Voltages.- Placement for Power Optimization.- Power Gating Design Automation.- Verification For Multiple Supply Voltage Designs.- Winning the Power Struggle in an Uncertain Era.- Pushing ASIC Performance in a Power Envelope.- Low Power ARM 1136JF-S Design._x000D_