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Digital Logic and Microprocessor Design with VHDL 2005 Edition at Meripustak

Digital Logic and Microprocessor Design with VHDL 2005 Edition by Enoch Hwang , Cengage

Books from same Author: Enoch Hwang

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  • General Information  
    Author(s)Enoch Hwang
    PublisherCengage
    ISBN9780534465933
    Pages588
    BindingHardback
    LanguageEnglish
    Publish YearFebruary 2005

    Description

    Cengage Digital Logic and Microprocessor Design with VHDL 2005 Edition by Enoch Hwang

    This book will teach students how to design digital logic circuits, specifically combinational and sequential circuits. Students will learn how to put these two types of circuits together to form dedicated and general-purpose microprocessors. This book is unique in that it combines the use of logic principles and the building of individual components to create data paths and control units, and finally the building of real dedicated custom microprocessors and general-purpose microprocessors. After understanding the material in the book, students will be able to design simple microprocessors and implement them in real hardware. Table of contents :- Chapter 1. Designing Microprocessors1.1Overview of a Microprocessor1.2Design Abstraction Levels1.3Examples of a 2-to-1 Multiplexer1.4Introduction to VHDL1.5Synthesis1.6Going Forward1.7Summary Checklist1.8ProblemsChapter 2. Digital Circuits2.1Binary Numbers2.2Binary Switch2.3Basic Logic Operators and Logic Expressions2.4Truth Tables2.5Boolean Algebra and Boolean Function2.6Minterms and Maxterms2.7Canonical, Standard, and non-Standard Forms2.8Logic Gates and Circuit Diagrams2.9Example: Designing a Car Security System2.10 VHDL for Digital Circuits2.11 Summary Checklist2.12 ProblemsChapter 3. Combinational Circuits3.1Analysis of Combinational Circuits3.2Synthesis of Combinational Circuits3.3* Technology Mapping3.4Minimization of Combinational Circuits3.5* Timing Hazards and Glitches3.67-Segment Decoder Example3.7VHDL for Combinational Circuits3.8Summary Checklist3.9ProblemsChapter 4. Standard Combinational Components4.1Signal Naming Conventions4.2Adder4.3Twos Complement Binary Numbers4.4Subtractor4.5Adder-Subtractor Combination4.6Arithmetic Logic Unit4.7Decoder4.8Encoder4.9Multiplexer4.10 Tri-state Buffer4.11 Comparator4.12 Shifter-Rotator4.13 Multiplier4.14 Summary Checklist4.15 ProblemsChapter 5. * Implementation Technologies5.1Physical Abstraction5.2Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET)5.3CMOS Logic5.4CMOS Circuits5.5Analysis of CMOS Circuits5.6Using ROMs to Implement a Function5.7Using PLAs to Implement a Function5.8Using PALs to Implement a Function5.9Complex Programmable Logic Device (CPLD)5.10 Field-Programmable Gate Array (FPGA)5.11 Summary Checklist5.12 ProblemsChapter 6. Latches and Flip-Flops6.1Bistable Element6.2SR Latch6.3SR Latch with Enable6.4D Latch6.5D Latch with Enable6.6Clock6.7D Flip-Flop6.8D Flip-Flop with Enable6.9Asynchronous Inputs6.10 Description of a Flip-Flop6.11 Timing Issues6.12 Example: Car Security System - Version 26.13 VHDL for Latches and Flip-Flops6.14 * Flip-Flop Types6.15 Summary Checklist6.16 ProblemsChapter 7. Sequential Circuits7.1Finite-State-Machine (FSM) Model7.2State Diagrams7.3Analysis of Sequential Circuits7.4Synthesis of Sequential Circuits7.5Unused State Encodings and the Encoding of States7.6Example: Car Security System - Version 37.7VHDL for Sequential Circuits7.8* Optimization for Sequential Circuits7.9Summary Checklist7.10 ProblemsChapter 8. Standard Sequential Components8.1Registers8.2Shift Registers8.3Counters8.4Register Files8.5Static Random Access Memory8.6* Larger Memories8.6.1 More Memory Locations8.7Summary Checklist8.8ProblemsChapter 9. Datapaths9.1General Datapath9.2Using a General Datapath9.3Timing Issues9.4A More Complex General Datapath9.5Dedicated Datapath9.6Designing Dedicated Datapaths9.7Using a Dedicated Datapath9.8VHDL for Datapaths9.9Summary Checklist9.10 ProblemsChapter 10. Control Units10.1 Constructing the Control Unit10.2 Examples10.3 Generating Status Signals10.4 Timing Issues10.5 Standalone Controllers10.6 * ASM Charts and State Action Tables10.7 VHDL for Control Units10.8 Summary Checklist10.9 ProblemsChapter 11. Dedicated Microprocessors11.1 Manual Construction of a Dedicated Microprocessor11.2 Examples11.3 VHDL for Dedicated Microprocessors11.4 Summary Checklist11.5 ProblemsChapter 12. General-Purpose Microprocessors12.1 Overview of the CPU Design12.2 The EC-1 General-Purpose Microprocessor12.3 The EC-2 General-Purpose Microprocessor12.4 VHDL for General-Purpose Microprocessors12.5 Summary Checklist12.6 ProblemsAppendix A. Schematic Entry Tutorial 1A.1 Getting StartedA.2 Using the Graphic EditorA.3 Specifying the Top-Level File and ProjectA.4 Synthesis for Functional SimulationA.5 Circuit SimulationA.6 Creating and Using the Logic SymbolAppendix B. VHDL Entry Tutorial 2B.1 Getting StartedB.2 Synthesis for Functional SimulationB.3 Circuit SimulationAppendix C. UP2 Programming Tutorial 3C.1 Getting StartedC.2 Synthesis for Programming the PLDC.3 Circuit SimulationC.4 Using the Floorplan EditorC.5 Fitting the Netlist and Pins to the PLDC.6 H ardware SetupC.7 Programming the PLDC.8 Testing the HardwareC.9 MAX7000S EPM7128SLC84-7 SummaryC.10 FLEX10K EPF10K70RC240-4 SummaryAppendix D. VHDL SummaryD.1 Basic Language ElementsD.2 Dataflow Model Concurrent StatementsD.3 Behavioral Model Sequential StatementsD.4 Structural Model StatementsD.5 Conversion RoutinesIndex



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