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Electrical Overstress (Eos): Devices, Circuits, And Systems at Meripustak

Electrical Overstress (Eos): Devices, Circuits, And Systems by Voldman, John Wiley

Books from same Author: Voldman

Books from same Publisher: John Wiley

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General Information  
Author(s)Voldman
PublisherJohn Wiley
ISBN9781118511886
Pages368
BindingHardcover
LanguageEnglish
Publish YearOctober 2013

Description

John Wiley Electrical Overstress (Eos): Devices, Circuits, And Systems by Voldman

Electrical Overstress (EOS) continues to impact semiconductor manufacturing, semiconductor components and systems as technologies scale from micro– to nano–electronics. This bookteaches the fundamentals of electrical overstress and how to minimize and mitigate EOS failures. The text provides a clear picture of EOS phenomena, EOS origins, EOS sources, EOS physics, EOS failure mechanisms, and EOS on–chip and system design. It provides an illuminating insight into the sources of EOS in manufacturing, integration of on–chip, and system level EOS protection networks, followed by examples in specific technologies, circuits, and chips. The book is unique in covering the EOS manufacturing issues from on–chip design and electronic design automation to factory–level EOS program management in today s modern world. Electrical Overstress (EOS): Devices, Circuits and Systems is a continuation of the author s series of books on ESD protection. It is an essential reference and a useful insight into the issues that confront modern technology as we enter the nano–electronic era.


Key Features:-

  • Fundamentals of electrical overstress, from EOS physics, EOS time scales, safe operating area (SOA)
  • EOS failures in both semiconductor devices, circuits and system
  • EOS protection on–chip design practices and how they differ from ESD protection networks and soluti
  • Discussion of EOS system level concerns in printed circuit boards (PCB), and manufacturing equipment
  • Examples of EOS issues in state–of–the–art digital, analog and power technologies including CMOS, LD
  • Practical off–chip ESD protection and system level solutions to provide more robust systems


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